MOS 6502 · reverse engineered from silicon

Inside the 6502

A complete, transistor-level reverse engineering of the MOS 6502 microprocessor — from a decapped chip and a microscope to a full schematic. Originally published in Hungarian in 2001, now translated to English.

The 6502 was one of the processors that kick-started the microcomputer revolution. Its first major application was the Apple II; in Hungary most people got to know it through the Commodore machines.

It was made in a 6 µm nMOS process with depletion-load gates, a single layer of aluminium metallization, and roughly 3,900 transistors. The plastic package can be removed with, for example, hot concentrated sulfuric acid; after rinsing, the die can be examined well under an optical microscope.

Decoding it took several months of work. The schematic is complete, though it may still contain mistakes.

  • 6 µmnMOS process
  • ~3,900transistors
  • 1metal layer
  • 56 / 13instructions / addressing modes

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Architecture

The 65xx family has a minimal set of registers, but thanks to its many addressing modes they can be used very efficiently: a 16-bit program counter, an 8-bit stack pointer, the status (flag) register, the accumulator, and the X and Y index registers. Stack operations and instructions working on the lowest 256 bytes of memory (the zero page) are one clock cycle faster than the rest, which speed-optimised software exploits. Simple instructions finish in 2–3 cycles. BCD arithmetic is supported automatically once the D flag is set — no separate adjust instruction and no extra clock cycle are needed.

Block diagram of the 6500 internal architecture
Internal architecture: register section on the left, control section on the right.

Pinout

6502 40-pin DIP pinout

Downloads

The layout is protected by copyright and must not be used directly for manufacturing. Looking at it, decoding it and taking ideas from it is fine, and everything published here can be downloaded freely. Comments and any errors you find are welcome at