MOS 6502 · reverse engineered from silicon
Full schematic
The complete transistor-level schematic of the 6502, redrawn by hand from the die photo. It is complete, although it may still contain mistakes — corrections are welcome.
Printable versions
The schematic was drawn in xfig. Besides the single-sheet PDF above, there are PostScript versions split into pages for printing and taping together:
- Full schematic, one vector sheet (PDF)0.4 MB
- Printable version, A3 pages (PostScript)6.4 MB
- Printable version, A4 pages (PostScript)10.7 MB
For explanations of the individual blocks — clock generator, instruction decoder, timing, interrupts, registers, BCD correction and ALU — see Circuits.